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Saturday 22 July 2017
Circuit Design for NAND
Circuit Design
Simulation Results
Parameter :
NMOS : W=2.50u , L=0.25u
PMOS : W=2.50u , L=0.25u
Technology File : TSMC 250nm
Monday 17 July 2017
Circuit Design for CMOS
Circuit Design
Simulation Results
Parameter :
NMOS : W=2.50u , L=0.25u
PMOS : W=2.50u , L=0.25u
Technology File : TSMC 250nm
Friday 14 July 2017
Layout Design for Full Adder
Microwind Layout Design
Simulation Result
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